Ken Silverman

A similar trick using LEA works for ceilings & floors: Existing code: ```asm shld ebx, ecx, 22 ;386:3cc, 486:2cc, ebx:[xxxxxxxxxxUUUUUUuuuuuuuuuuVVVVVV] shld ebx, ecx, 6 ;386:3cc, 486:2cc, ebx:[xxxxUUUUUUuuuuuuuuuuVVVVVVUUUUUU] and ebx, ebp...

Thanks for the asm formatting hint. I edited my posts above and they look much better now! If you want to test frame rate for the above code, it really...

The penalty for write AL immediately followed by read EAX can be avoided by putting an unrelated instruction between them. Remember to re-order instructions when putting them back into the...

I have a new wall loop for 386 & 486. This one has no base+index addressing penalties: ```asm ;eax:&pal, ebx:Vhi, ecx:Vlo, edx:Vinclo, esi:&tex, edi:&scr, ebp:Vinchi add ecx, edx ;386:2cc, 486:1cc,...

..and here is a new ceiling/floor loop for 386 & 486: ```asm ;eax:&pal ;esi:&tex ;edi:&scr ;ecx:[ ulo .. vhi .. ] ;edx:[uinclo .. vinchi .. ] ;ebx:[ 0 0 vhi...

There are 2 ways to use ESP: 1. Without disabling interrupts, as a small iteration counter: ```asm espbak: dd 0 .. mov dword ptr ds:[espbak], esp mov dword ptr ds:[endp-4],...

While reading my trusty "i486 Microprocessor Programmer's Reference Manual", page 844 (G-8), I noticed this stinker under "PREFIX OPCODES": "On either processor, all prefix opcodes, including OFh, segment override, operand...

That's +1.3%, +0.4%, and -1.5% (respectively). Are those fps numbers consistent across runs? If you're using the 140Hz interrupt counter and doing a multi-minute test, that's kind of slow and...

Ah. I wasn't thinking about that when allocating registers. Here are some easy solutions: 1. Combine texture increments (edx:Vinc_lo & ebp:Vinc_hi) into the same register since their bits don't overlap....

Here's a picture of the texture registers I use in the noshift loop: ```asm 31...24 23...16 15.....8 7......0 ecx: V_lo: [vvvvvvvv vvvvvvvv vvvvvvvv v-------] ebx: V_hi: [-------- -------- -------- -VVVVVVV]...