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Published 3 weeks ago • verified publisher icon zufuliu

[Feature Request] Add syntax highlighting and code folding for SystemVerilog language (.sv, .svh)

Open brooke-yucx opened this issue 3 years ago • 1 comments

This is probably the most popular language for hardware designers and it is a super set of Verilog HDL language. Could you add the support? Really thank you. 😀

brooke-yucx avatar Jul 21 '22 08:07 brooke-yucx

Yes, VHDL 2008 and SystemVerilog 2012 will be supported in next release. people with access to IEEE can provide PDF documents for newer standards.

zufuliu avatar Jul 21 '22 08:07 zufuliu

Verilog 2005 and SystemVerilog 2012 implemented by 4c5433fc3ffbe5c6ac1b303c31b8d46a1026252e, feel free to test latest builds.

zufuliu avatar Aug 15 '22 12:08 zufuliu