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Random IKBD malfunction
The FPGA-reimplementation of the Atari intelligent keyboard (IKBD) may, in some uncertain circumstances, not be working. It seems like the serial communication is lost between the hd6301 keyboard processor and the ACIA. As the IKBD is also responsible for mouse management, this problem also prevents the mouse from working.
The exact circumstances to reproduce the error are unclear.
Typical symptoms
- On TOS 1.02/1.04, directly after boot a single keyclick sound is emitted, then the keyboard does not respond to keypresses or mouse movement/buttons.
- On EmuTOS (tested on version 1.3), on a cold boot, the boot process hangs for a few seconds after the initial one-line "EmuTOS Version 1.3" message, then again during display of the diagnostics screen, before displaying the time. EmuTOS seems to be using the IKBD clock to save the time between reboots. if the IKBD time retrieval is unsuccessful, EmuTOS will display a time of 00:00:00.
- The integrated zeST menu system (accessed with either of the Scroll Lock or PageUp keys) still responds to the keyboard. You can try it to test if the USB keyboard you are using works correctly.
- The problem may not appear at once when the board is powered on, but later on. Once it appears, only a complete power off can (not always and temporarily) fix it.
- The probability of appearing depends on the different releases for the different boards (7010 or 7020 versions). In some releases, the bug does not appear at all.
Possible causes
The problem arises in parts I haven't developed myself (I used open-source cores for hd6301 and ACIA). There could be an issue with the clocking implementation, which could lead to some race conditions. I must investigate that part.
The problem randomly appears in some (not all) builds, and especially it tends to not appear at all in my debug builds. I do integrate the Xilinx Integrated Logic Analizer (ILA) in the debug builds, with IKBD/ACIA tx/rx signals systematically enabled just in case the problem appears, but so far I have been unsuccessful in spotting the problem. Simulation does not seem to be very helpful either.
Best course of action would be to work on a thorough re-implemetation of the clocking mechanisms involved in both the ACIA and hd6301, and make them fully compliant with the "master clock + clock enables" mechanism that is used in all other components (see this post for more information).