Qiang Yu

Tried 1300x1300, same tiled texture. I think I have to setup a mali driver supporting gbm interfaces for this.

What's the purpose of this? I'm investigating the aligned linear texture desc setup, not the tiled texture desc setup.

Not sure it's possible to reach OpenGL for mali400, because we haven't done full OpenGL ES yet. "OpenGL" just a name, I mean this class of API.

Right, I also meet this problem after 18.0 rebase. But due to want to focus on kernel, I haven't solve it from the root. Now I'm doing 18.1 rebase, so...

In fact, even we don't recombine scalar to vector, ppir should not fail, but only generate longer code. This "regalloc fail" is indeed the ppir need to implement reg spill...

I guess it's here: https://github.com/yuq/mesa-lima/blob/lima-18.0/include/drm-uapi/lima_drm.h#L107 Each PP can have a memory stack which I guess is used to store tmp.

lima_pp_frame_reg one is dummy, drm_lima_m400_pp_frame one is used, one for each PP.

In this function: https://github.com/yuq/linux-lima/blob/lima-4.17-rc4/drivers/gpu/drm/lima/lima_pp.c#L303 LIMA_PP_FRAME & LIMA_PP_STACK are per PP, so the lima_pp_frame_reg will be set to new value before task start.

LIMA_PP_STACK is used by mali450 here: https://github.com/yuq/linux-lima/blob/lima-4.17-rc4/drivers/gpu/drm/lima/lima_pp.c#L321 Just because bcast will set same address to all PPs, so I have to set it individually for each PP. LIMA_PP_STACK_SIZE is same...

I think you are right. 2 is needed anyway for correctness and 1 is for better performance. But 1 needs to be done also because I wrote ppir for vec4,...