Added Intel-specific code (tested with Quartus 13.1)

[xn--nding-jua]

I ported the device-specific parts of the Non-FIFO-EthernetMAC for usage with Intel FPGAs and Quartus. The code is tested using a Cyclone III EP3C40 FPGA with Marvel 881119 PHY. As I have tested only 100Mbps, the code might not work for 1Gbps, but it is better than nothing and is a good starting-point for others.

[yol]

Hi and thanks for trying this out on an Intel chip. Nice to hear that it worked without much fiddling. I agree that 1 Gbps using GMII will probably not work this easily, but of course 100 Mbps is a start.

Regarding the code:

• As far as I can see, single_signal_synchronizer.vhd and utility.vhd are just copies. What is the point of adding them?
• You do not have to repeat the full license, it is sufficient to keep the pointer to LICENSE.md.
• Current limitations of the intel mii_gmii_io (e.g., not tested with 1 Gbps) should be documented in the file.

[xn--nding-jua]

Hi,

"single_signal_synchronizer.vhd" contains a direct passthrough of signals. This is missing in the original file. Quartus will not pass the signals without a specific architecture.

"utility.vhd" I have changed the function "extract_byte" as Quartus 13.1 does not know how to compile the given variable "byteno"

I will update the pull-request tomorrow to match the remarks regarding the limitations.

Thanks! :)

[yol]

"single_signal_synchronizer.vhd" contains a direct passthrough of signals. This is missing in the original file. Quartus will not pass the signals without a specific architecture.

I'm not sure I understand what you mean? https://github.com/yol/ethernet_mac/blob/master/generic/single_signal_synchronizer_simple.vhd already has the generic implementation. Can't you just add this file to your project?

"utility.vhd" I have changed the function "extract_byte" as Quartus 13.1 does not know how to compile the given variable "byteno"

Wow, interesting that quartus fails with something that Xilinx was able to compile. What is the exact error message? Can you check if maybe there is some synthesizer option that you can enable? Which VHDL language standard do you have set?

[xn--nding-jua]

Sorry, I mixed it up: in the generic "single_signal_synchronizer_simple.vhd" the architecture-part is there, but not the entity-part. So it seems, that Quartus needs knowledge about the individual signal-types - even if they are straight-through-connections.

As I'm not a very experienced VHDL-programmer at all, I did not find a better solution for the extract_byte-function. Maybe there is a simple solution.

[yol]

Yes, it needs the entity, but it can be in a separate file. You can see that even for the spartan6 architecture of the synchronizer the entity definition is not in the same file. So this should not be a problem at all, you might potentially have to change some synthesis settings though.