Jintao YU comments

Repositories
Issues
Comments

Results 1 comments of


                                            Jintao YU

CSP ignores 3-or-more-qubit gates

@1ucian0 I tried to add 3-or-more-qubit gates as constraints, and the pass generates this layout: ``` Layout({ 1: Qubit(QuantumRegister(3, 'qr'), 0), 0: Qubit(QuantumRegister(3, 'qr'), 1), 2: Qubit(QuantumRegister(3, 'qr'), 2) })...