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Published 20 hours ago • verified publisher icon xdanieldzd

Check instruction timings with Robert Peip's timingtest.ws

Open asiekierka opened this issue 2 years ago • 2 comments

https://github.com/MiSTer-devel/WonderSwan_MiSTer/tree/main/testroms/timingtest

asiekierka avatar Dec 01 '22 20:12 asiekierka

Going to say this issue depends on issue #11, as the current CPU emulation code technically targets the V30MZ, but tends to miss the mark at times (ex. with the previous AAD/AAM behavior). It's also a bit of a mess in general, just from a design perspective alone, and should benefit from a rewrite even if it were fully accurate already.

xdanieldzd avatar Dec 07 '22 17:12 xdanieldzd

As a point of reference, it might help to know that ares is ISC-licensed and its V30MZ core passes all the timing tests in the above test ROM.

asiekierka avatar Dec 07 '22 17:12 asiekierka