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wolfSSL
Fix compilation issues when using PKA=1 for i.MX RT targets
I encountered issues when compiling with PKA?=1 in my .config file. With these changes it compiles and seems to work (stepping into the code I end up in the fsl_dcp driver and the speed increases).
Contributor agreement on file. Changes look good to me. Do you know if PKA supported on all the i.MX RT targets? Maybe we should add another CI test for these? diff.patch
@dgarske re: your question, All the i.MX RT 10xx derivatives that wolfBoot supports use the DCP hardware which provides AES and SHA acceleration. Other (newer) parts in the RT family like the cortex M33-based parts (RT 500, etc) and the RT 11xx also have HW accel but use different IP so would require different MCUXpresso drivers. But as far as the RT platforms we currently support in wolfBoot go, PKA via the DCP module is present on all of them.
Checking the ref. manuals for i.MX [RT1010, RT1064], and all have the DCP (data co-processor).
@dgarske I added the new CI builds as suggested, and gave them a _pka suffix.
Not sure if you're OK with having -DDCP_USE_DCACHE=0 in the config examples for the RTs, or if you'd like to make separate configs for the PKA=1 builds. Just let me know :)
Not sure if you're OK with having
-DDCP_USE_DCACHE=0in the config examples for the RTs, or if you'd like to make separate configs for thePKA=1builds. Just let me know :)
Hi @MulattoKid , that is fine with me, but can you expand on the reason the data cache needed to be disabled? Either a comment here in the PR on in the .config.
Not sure if you're OK with having
-DDCP_USE_DCACHE=0in the config examples for the RTs, or if you'd like to make separate configs for thePKA=1builds. Just let me know :)Hi @MulattoKid , that is fine with me, but can you expand on the reason the data cache needed to be disabled? Either a comment here in the PR on in the .config.
When compiling without the DCACHE disabled, compilation fails in the dcp_port with an explicit compile time error. I haven't looked into what the implications of this are, but as the port explicitly doesn't support DCACHE I assumed disabling it would be fine. Let me know if I've misunderstood something 👍