Catherine comments

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                                            Catherine

_convert_fragment() has polynomial time complexity as signals are added to design

> Could you prepare a PR with this change, please? Sorry, I misunderstood. For some reason I thought you posted a patch in the PR, not just a reference to...

_convert_fragment() has polynomial time complexity as signals are added to design

> eg why we have to group signals vs just putting each one in their own process We have to group signals because the target of an assignment can be...

_convert_fragment() has polynomial time complexity as signals are added to design

This is fixed by the new IR in the `main` branch.

vendor/xilinx: support for yosys nextPNR toolchain

@mwkmwkmwk ?

sim: Add Observer

I think this interface isn't appropriate for larger designs (especially ones too large to simulate with the Python simulator and which require CXXRTL). Since a Python function is called for...

Using Enum as FSM state does not respect the Enum value

Adding to the 0.4 milestone, with the change being to deprecate anything but strings being used as FSM state names.

Using Enum as FSM state does not respect the Enum value

> That's completely unintentional--the FSM states are supposed to be strings only at the moment. Now that I'm looking at the code again, I think this might have been intentional...

Should build products be documented and how?

It seems like there's nothing actionable here.

Simulation : abort simulation when step() does not converge

I think this doesn't need an RFC, it's a simple internal change to the engine. We don't even have to make the configuration mechanism public.

vendor.lattice_machxo_2_3l: fix sdc generation

I don't believe this PR fixes the issue it claims to fix. I still get this error: ``` @W: MT548 :"/home/whitequark/Projects/amaranth/build/top.sdc":2:0:2:0|Source for clock clk not found in netlist. ```