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unable to generate OSTickISR using qemu-system-ppc -M bamboo -cpu 440epb

Open gthaker opened this issue 2 years ago • 0 comments

I am using Ports/PPC440 and qemu-system-ppc to learn more about uC-OS2. Tasks are running but I don't get OSTickISR to happen. I see in file os_cpu_a.S there is:

.org _vectorbase + 0x0700
DEC_ISR: OSTickISR

and

   lis     4,  _vectorbase@h                           /* Initialize the IVPR register                */
    ori   4, 4,  _vectorbase@l
    mtivpr  4
    mtivor0 4

    addi     4, 4, IVOR1_VAL
    mtivor1 4

    addi     4, 4, SIXTEEN_BYTES
    mtivor2 4
...
...
   addi     4, 4, SIXTEEN_BYTES
    mtivor10 4

Above initializes IVPR and IVOR10

I may then also need to enable interrupts though it seems this is done in the stack frame of new uC-OS2 tasks in os_cpu_c.c

    /* Interrupts will be enabled when the task is started           */
    msr    |= 0x00028000;

Do I would need to load an initial value in the decrement register (possibly w/ auto-reloading)? How does one do this? Is there code example (either for PPC440 or related) that I can use to see how to enable OSTickISR? The uC-OS2 book says on page 389:

Because we didnt enable interrupts nor did we start the clock tick, OSTimeDly(1) will never return to TestTask() !

But I can't figure out how to get OSTickISR to happen. Any hints and pointers welcome. Thanks.

I run my compiled binary with:

qemu-system-ppc -M bamboo -cpu 440epb -nographic -kernel test.elf -s

and my Linkmap is:

ENTRY(_Reset)
SECTIONS
{
. = 0x10000;
startup : { startup.o(.text)}
.data : {*(.data)}
.bss : {*(.bss)}
. = . + 0x500;
sp_top = .;
}

gthaker avatar Oct 14 '21 17:10 gthaker