Pirmin Vogel

Thanks for the quick reply and further explanations @Silabs-ArjanB . For simplicity, I am only replying to questions that you didn't resolve already. > > In case of compressed instructions,...

sorry @colinoflynn, I completely forgot about this issue. I fully understand your points. And as always it's very hard to fit all the needs. Anyway, the existing project format and...

After a long time, I've finally been able to successfully test `as_int=True` argument proposed by @alex-dewar . To actually reduce the memory footprint, one also has to change the data...

Thanks @cnan123 for reporting this issue. I didn't manage to reproduce this with Synopsys VCS R-2020.12-SP2. Unfortunately, I currently don't have access to 2020.03-SP1 anymore. Maybe someone else from the...

While going through old issues and checking the documentation, I noted that the the first part of the issue (document what it means to be a "supported" config and currently...

I just noted that more recent development versions of the tools we use (e.g. the Spike version for @GregAC 's cosim framework) as well as GCC v.10.2.0 (see https://github.com/riscv-collab/riscv-gcc/tree/riscv-gcc-10.2.0-rvb) and...

Thanks for your feedback @luismarques ! This sounds great, I suggest that once we provide both an LLVM and GCC toolchain that support these pseudo-instructions, we make the tracer to...

Hey @towoe , @imphil , @rswarbrick , more than 7 months have passed since the last activity in this PR. Do you know what the status of this PR is?...

Hi @RTLhamster , thanks for your question. The reported behavior is inline with the [RISC-V priviledge spec (see Section 3.1.10)](https://github.com/riscv/riscv-isa-manual/releases/download/Priv-v1.12/riscv-privileged-20211203.pdf). In particular the spec says: > The event selector CSRs,...

Thanks for filing the issue @msfschaffner . I am currently working on this. The task can be broken down into the following steps: - [x] PROLEAD setup for KMAC, a...