Kuan-Wei Chiu
Kuan-Wei Chiu
See: https://sourceware.org/git/?p=newlib-cygwin.git;a=commit;h=5f15d7c5817b07a6b18cbab17342c95cb7b42be4
I attempted to implement an LIRS cache and conducted performance testing. Unfortunately, I observed regressions in both the Coremark and Dhrystone benchmarks. Here are the data: - i5-10500 | Metric...
> > I attempted to implement an LIRS cache and conducted performance testing. Unfortunately, I observed regressions in both the Coremark and Dhrystone benchmarks. > > Lately, we have encountered...
> > Unfortunately, I observed regressions in both the Coremark and Dhrystone benchmarks. > > In addition to the typical benchmark suite, which includes CoreMark and Dhrystone, we also make...
I've noticed that when using the code from the 'wip/jit' branch with MIR as the JIT backend and running the scimark2 benchmark with my implemented LIRS cache, I've encountered a...
After conducting further testing, I have observed that regardless of the cache replacement algorithm used, the cache hit ratio consistently remains above 99.99%. Therefore, I believe that the primary factor...
I acknowledge the possibility that CoreMark or Dhrystone may exhibit significant differences from real-world workloads. Perhaps, it would be prudent for us to explore alternative benchmarks that more accurately represent...
> If you are exploring [semu](https://github.com/sysprog21/semu), please note that there is a fork called [semu-c64](https://github.com/onnokort/semu-c64) which includes additional features like `insn_count` for enhanced analysis and checkpoint functionality. Thanks for the...
I noticed that the JIT compiler's code cache in the JVM doesn't utilize any cache replacement algorithm. Instead, when the code cache is full, it either disables the JIT compiler...
My speculation is that in real workloads, the number of cache_get operations is typically much larger than cache_put operations. However, it's only during cache_put that the need to select a...