veryl
veryl copied to clipboard
Interface composition
If interface can have interface instances as the member, interface composition can be achived like below. Syntax and use case should be more considerd.
interface Read {
}
interface Write {
}
interface RW {
inst read: Read;
inst write: Write
}
Refs: https://www.reddit.com/r/FPGA/comments/1exhbtj/comment/ljdyafm/?utm_source=share&utm_medium=web3x&utm_name=web3xcss&utm_term=1&utm_content=share_button