vtr-verilog-to-routing
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Remove +1 from wirelength estimate
To calculate the wirelength estimate or BB cost, we used the following formula: (bb.xmax - bb.xmin + 1) * crossing;
We should try to get rid of the +1 in these and see if it cuts CPU time a little. It wouldn't affect optimization since it's a constant, although it would affect our wirelength estimates a little (but we could retune the wirelength estimates done after placement to correct for that).