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Published 20 hours ago • verified publisher icon verilog-to-routing

[WIP] 3D NoC

Open soheilshahrouz opened this issue 7 months ago • 4 comments

Description

Generalizing the NoC data structures, architecture description and routing algorithms to 3D (multi-layer) FPGAs.

Motivation and Context

VTR is mostly 3D now, but the NoCs are still only 2D.

How Has This Been Tested?

Created a new arch file and ran synthetic benchmarks on this new 3D NoC arch within the 3D Stratix IV arch. The 10x10 2D mesh is replaced by two 7x7 meshes stacked on top of each other. All the benchmarks passed, and the QoR metrics are slightly better as the 3D NoC topology shortens some traffic flows.

CI has been updated to run some tests on this 3D architecture.

Types of changes

  • [x] New feature (change which adds functionality)

Checklist:

  • [x] My change requires a change to the documentation
  • [ ] I have updated the documentation accordingly
  • [ ] I have added tests to cover my changes
  • [ ] All new and existing tests passed

soheilshahrouz avatar Jul 16 '24 22:07 soheilshahrouz