vtr-verilog-to-routing
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Change RRG storage to keep (drive pt, direction) instead of (start, end)
The current expansion pruning in the router uses the drive point of every RRNode
((xlow ,ylow)
for non-directional nodes). This check is inside a hot loop (in connection_router.cpp
), so there may be performance benefits to store (xdrive, ydrive, dir)
in the RRG storage, since the router will only fetch two values instead of three + a branch.
For bidir wires (xdrive, ydrive)
can be just (xlow, ylow)
.