Clock resource detection

[kimiatkh]

Description

This branch adds support to distinguish clock-related resources in the rr graph. Clock segments are identified using a new optional attribute called res_type. When set to gclk, it signifies that a segment is part of the clock network. Additionally, to pinpoint virtual sink nodes specific to clock networks, a new optional attribute, clk_res_type, has been introduced within the rr node tags. The only value supported for clk_res_type is currently virtual_sink but it can be extended to include more clock resource types. To accommodate multiple clock networks, we introduced an additional optional variable called name. When clk_res_type is set to virtual_sink, the name variable is referenced to determine the name of the clock network represented by this virtual sink.

Motivation and Context

Commercial FPGAs nowadays incorporate dedicated clock networks, often consisting of multiple clock regions. Existing support in VPR for modeling and routing through such clock networks is limited. This pull request takes the initial steps towards enhancing VPR's understanding of clock network resources.

Types of changes

• [] Bug fix (change which fixes an issue)
• [x] New feature (change which adds functionality)
• [ ] Breaking change (fix or feature that would cause existing functionality to change)

Checklist:

• [ ] My change requires a change to the documentation
• [x] I have updated the documentation accordingly
• [x] I have added tests to cover my changes
• [] All new and existing tests passed