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Published 20 hours ago • verified publisher icon verilog-to-routing

commands for the shortes place and route

Open zliu1Charlotte opened this issue 1 year ago • 0 comments

Hi, I am curious on what is the command for forcing the design to have the shortest routing, also the longest routing? Thanks!

I do see there are --place_algorithm {bounding_box | criticality_timing | slack_timing} and --router_algorithm {breadth_first | timing_driven}

but I tried and there are no big differences.

zliu1Charlotte avatar Mar 23 '23 23:03 zliu1Charlotte