vtr-verilog-to-routing
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verilog-to-routing
Dense initial placement
Initial placement used to fail in case of high utilization or long chains. New approach called dense_placement has been added to initial placement, make it possible to redo initial placement if random placement could not find a legal solution for high utilization designs. Relate issue : [https://github.com/verilog-to-routing/vtr-verilog-to-routing/issues/2036#issuecomment-1184739027](Initial Placement issue)
List of Design that passing now:
- Brainwave
- tpu_like.small.os
- tpu_like.small.ws
- tpu_like.medium.os
- tpu_like.medium.ws
- dla_like.large
@MohamedElgammal @vaughnbetz
Looks 3 symbiflow circuits are failing with "No routing path exists" for a special connection. Maybe some special IO placement code, or respecting locked down blocks, got changed accidentally?
Here is the comparison between new version and baseline results for three benchmarks. titan_other titan_quick_qor vtr_reg_qor_chain_large
Looks good. The QoR looks fine; there are some ups and downs in cpu time but that appears to be due to machine load as sometimes the new code is slower and sometimes it is faster, and there are changes in various parts of the flow (pack, place, route, even abc). Will merge once CI passes.