vtr-verilog-to-routing
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WIP RRGraphView node_is_wire() Implementation
Description
In this PR, I have implemented RRGraphView::node_is_wire()
throughout VTR. Every time rr_graph.node_type(node) == CHANX || rr_graph.node_type(node) == CHANY
was used has been replaced with rr_graph.node_is_wire(node)
. In order to do this, I followed a pattern similar to that in previous RRGraphView PRs.
Motivation and Context
Removes reliance upon CHANX and CHANY types when determining if node is a wire.
How Has This Been Tested?
I have run the regression QoR testing found at $ ../scripts/run_vtr_task.py regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain
. Results from these QoR tests can be found below. The file containing all results can be found here
Only rows that are different are shown.
VTR Before These Changes | With Changes in this PR | |
---|---|---|
vtr_flow_elapsed_time | 1 | 1.005244594 |
odin_synth_time | 1 | 0.939894168 |
abc_synth_time | 1 | 0.992427584 |
max_vpr_mem | 1 | 1.000167355 |
pack_time | 1 | 1.041704909 |
place_time | 1 | 0.995212009 |
min_chan_width_route_time | 1 | 1.002900235 |
crit_path_route_time | 1 | 1.001591785 |
Types of changes
- [ ] Bug fix (change which fixes an issue)
- [x] New feature (change which adds functionality)
- [ ] Breaking change (fix or feature that would cause existing functionality to change)
Checklist:
- [ ] My change requires a change to the documentation
- [ ] I have updated the documentation accordingly
- [ ] I have added tests to cover my changes
- [x] All new and existing tests passed