Sahil Siddiq

> It breaks DWARF profile loading in some of the tests in its current state: > > ``` > [XX] db/cmd/dwarf "ARM types" > RZ_NOPLUGINS=1 /usr/bin/rizin -escr.utf8=0 -escr.color=0 -escr.interactive=0 -eflirt.sigdb.load.system=false...

Hi. I have never contributed to verilator before. I would like to work on this.

Thank you for your reply. > Some notes: > emitTimeChange is what prints the timestamp. > Both vcd and fst trace formats use the same base class, so I think...

Hi, I was taking a look at the contents of `t_timing_osc.out` after running `test_regress/t/t_timing_osc.pl`. Part of the output is as shown below: ``` $version Generated by VerilatedVcd $end $timescale 1fs...

Hi. Based on what I have understood so far, assuming no offloading for the time being, the timestamp is printed to the trace file [here](https://github.com/verilator/verilator/blob/master/include/verilated_trace_imp.h#L586), and then signal changes are...

Sorry for the late response. > I think checking in emit* is preferable (note full* calls emit*). I was thinking of shifting the implementation of `emitTimeChange` present in `VerilatedVCD` and...

Will `VerilatedTraceOffloadBuffer` be used when `--threads` is greater than 1?

Thank you for the response. I am still pondering over what approach might be best to handle this. Right now, I am thinking of setting a flag as soon as...

Also, since the simulation is evaluated only at the end of each cycle, is it safe to say that each signal will be printed at most once per cycle. If...

Thank you for the responses. I think I've understood how to tackle this issue. In the `emit*` functions, I plan on using a thread_local variable to check if the thread...