lakeroad
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uwsampl
FPGA synthesis tool powered by program synthesis
When changing the definition of the `interface-implementation` struct so that it was `#:transparent`, I found that tests began passing. One hypothesis is that appending `#:transparent` makes `test-equal?` perform a different...
It's bad because, when we call the generated functions when doing synthesis, they introduce symbolic variables that don't necessarily end up in the overarching Lakeroad expression. That is, a Lakeroad...
This is incorrect!
Xilinx UltraScale+ FPGAs have LUTs with 6 inputs and 2 outputs. These LUTs can be used to efficiently implement e.g. bitwise operations. The LUT primitive interface can be updated to...
The following operators, when plugged into `bvexpr->cexpr`, do not pass basic tests (e.g. `(concat a b)`). I _think_ I've accurately documented the bitwidth cases which break these operators: ## `concat`:...