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Published 20 hours ago • verified publisher icon uwsampl

Project idea: more efficient mappings of ASIC standard library cells to FPGAs for emulation

Open gussmith23 opened this issue 1 year ago • 1 comments

I heard this was an issue from Dan Petrisko. Should talk to him about it.

gussmith23 avatar Nov 29 '23 19:11 gussmith23