Support for EL3 system registers

[SilentVoid13]

Hi, it looks like Unicorn currently doesn't support some EL3 registers on ARM architectures (spsr_el3, scr_el3, cptr_el3, ...) and throws an interrupt 1 when encountering an instruction such as msr scr_el3, x0.

I wanted to ask how hard the addition of those registers is? I'm willing to give it a try. Does it just require some small modifications in the uc_arm64_reg structure and the reg_read and reg_write functions in qemu/target/arm/unicorn_aarch64.c or is it more complex? I'm not familiar with the codebase, so I may be missing something.

Thank you!