Bug: 'csr_swap' type operations on SATP register do not work

[ultraembedded]

Issue: Reading and writing (i.e. csr_swap) the CSR SATP register in the same operation will result in a 0 being returned regardless of the current SATP register contents. Normally just writing the register, or just reading the register is fine.

This occurs due to the pipeline flush caused by this event which assumes it can squash the writeback result.

This is a fairly low priority issue as RISC-V Linux port does not try to do this operation.