riscv-torture
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Extending Torture with RISC-V Vector ext. (v0.9)
Hi, This fork that I want to merge includes verified changes that are needed to add support for Torture RISC-V test generator to be able to generate vector instructions (v0.9) in its assembly tests. Since v1.0 of the RISC-V "V" ext. is not ratified as of yet, maybe we can add support for v0.9 first and then later on, bump it up to v1.0.
This is the second iteration of my PR. In the first one, Yunsup wanted some attention to be paid at coding style and the commits to be in a viewable fashion. Those things are taken care of and some other rough edges have been polished as well. This started off as a learning project but I feel it can also be a good contribution to the open-source RISC-V community.
More information about this extension can be found appended in the README file.
Thanks, Hassaan
@hassaankhalid-lm @yunsup @hcook any development or update on extending torture with RISC-V Vector extension ?