compile error

[runninglinuxkernel]

when i compile the BOOM follow those command: cd sims/verilator make CONFIG=LargeBoomConfig

i saw some error: [info] loading settings for project firrtl-build from plugins.sbt ... [info] loading project definition from /home/figo/riscv/chipyard/tools/firrtl/project [info] loading settings for project firrtl from build.sbt ... [info] resolving key references (55373 settings) ... [info] set current project to chipyardRoot (in build file:/home/figo/riscv/chipyard/) [info] set current project to chipyard (in build file:/home/figo/riscv/chipyard/) [info] compiling 25 Scala sources to /home/figo/riscv/chipyard/generators/testchipip/target/scala-2.12/classes ... [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/SPIFlash.scala:9:30: object spi is not a member of package sifive.blocks.devices [error] import sifive.blocks.devices.spi.{PeripherySPIFlashKey} [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/SPIFlash.scala:78:15: not found: value PeripherySPIFlashKey [error] spi.zip(p(PeripherySPIFlashKey)).zipWithIndex.foreach { case ((port, params), i) => [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/SPIFlash.scala:79:56: value fSize is not a member of Any [error] val spi_mem = Module(new SimSPIFlashModel(params.fSize, i, rdOnly)) [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/SPIFlash.scala:79:63: type mismatch [error] found : Any [error] required: Int [error] val spi_mem = Module(new SimSPIFlashModel(params.fSize, i, rdOnly)) [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/SPIFlash.scala:82:22: value csWidth is not a member of Any [error] require(params.csWidth == 1, "I don't know what to do with your extra CS bits. Fix me please.") [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:29:28: not found: type UARTPortIO [error] val uart = Flipped(new UARTPortIO(UARTParams(address = 0))) // We do not support the four wire variant [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:29:39: not found: value UARTParams [error] val uart = Flipped(new UARTPortIO(UARTParams(address = 0))) // We do not support the four wire variant [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:29:50: not found: value address [error] val uart = Flipped(new UARTPortIO(UARTParams(address = 0))) // We do not support the four wire variant [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:123:25: not found: type UARTPortIO [error] def connect(uart: Seq[UARTPortIO], baudrate: BigInt = 115200)(implicit p: Parameters) { [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:130:25: not found: type UARTPortIO [error] def connect(uart: Seq[UARTPortIO], div: Int) { [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/UARTAdapter.scala:126:25: not found: type UARTPortIO [error] def connect(uart: Seq[UARTPortIO], baudrate: BigInt, clockFrequency: BigInt) { [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/tsiHost/TsiHostWidget.scala:14:22: object util is not a member of package sifive.blocks [error] import sifive.blocks.util.{NonBlockingEnqueue, NonBlockingDequeue} [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/tsiHost/TsiHostWidget.scala:121:44: not found: value NonBlockingEnqueue [error] NonBlockingEnqueue(txQueue.io.enq, 64)), [error] ^ [error] /home/figo/riscv/chipyard/generators/testchipip/src/main/scala/tsiHost/TsiHostWidget.scala:123:44: not found: value NonBlockingDequeue [error] NonBlockingDequeue(rxQueue.io.deq, 64)) [error] ^ [error] 14 errors found [error] (testchipip / Compile / compileIncremental) Compilation failed [error] Total time: 11 s, completed Oct 21, 2021 11:20:22 PM make: *** [/home/figo/riscv/chipyard/common.mk:106: generator_temp] Error 1 [figo@localhost verilator]$

[quyleanh]

Did you build toolchain before compile? 1.4.3. Building a Toolchain

[runninglinuxkernel]

Did you build toolchain before compile? 1.4.3. Building a Toolchain

yes, i have built the toolchain

[quyleanh]

I think the problem is source clone. Try to clone again and make sure there is no error. I have faced this issue before.

[abejgonzalez]

This error indicates that the scripts/init-submodules... script failed obtaining all submodules. I would try to clone again as well.