Tsung-Wei Huang
Tsung-Wei Huang
@hey927 You will need to use a g++ compiler. Use the following configuration command to switch to G++: ``` ~$ cmake ../ -DCMAKE_CXX_COMPILER=/path/to/your/g++ ```
Hi What's your g++ version? On Thu, Aug 20, 2020 at 12:11 PM Divya Gupta wrote: > Also, tried changing paths to both C and C++ compiler as follows: >...
Hi @kat54347 , this is the verilog parser issue. Would you please change the line `wire n1, n2;` to two separate lines: ``` wire n1; wire n2; ``` Sorry for...
for most of those syntaxes, ot skip the parsing and only process sections important for timing anlaysis.
Hi @Regor191 , is there any way you can generate a representative library for me so I can test it on my side? I know there is NDA but if...
Hi @Regor191 I may be a bit delay on this because I am now on travel. But I will get into this as soon as possible. I apologize my late...
Hi @Regor191 , the indices are required for inter- and extrapolation. For example, the below example is a complete timing LUT. OpenTimer will read `index_1` and `index_2` to figure out...
Hi @Regor191 I see. I will add a block to initialize the table size from the lut template if no indices are found in the local table definition block. Will...
Hi @Regor191 Not a problem at all. In fact, you are giving very good suggestion and bug report. I will fix it as soon as I finish the conference. At...
Hi @renau , I will work on this example and let you know when it is done! Thank you for the question!