openFPGALoader
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write to flash on GW5A is not yet supported
i got a tang mega 138k pro which use Gowin GW5AST 138 as main fpga chip,
but now openFPGALoader not supported to write its external flash, will support soon?
Thank you!
I will receive a mega in few days (or a week), will be able to work on adding external flash support.
got your board ? ^_^
Yes! I have received my board and started to see how to access flash for this family. It's not really complex (a bit tricky) but I have first to review a PR for gowin devices.
Good news! i’m a newbie on this, thanks for your help!
i noticed that openFPGAloader support flash GW5A now! so happy!
but seems write to SRAM function bad now.... when Load a new fs file to SRAM, nothing happen, and READY led on board keeping ON, which should be off
here is log for SRAM upload
openFPGALoader -v ws2812_lcd_key.fs No cable or board specified: using direct ft2232 interface Jtag frequency : requested 6.00MHz -> real 6.00MHz
found 1 devices index 0: idcode 0x1081b manufacturer Gowin family GW5AST model GW5AST-138 irlength 8 File type : fs Parse file Parse ws2812_lcd_key.fs: checksum 0xd735 Done DONE bitstream header infos CRCCheck: ON Compress: OFF ConfDataLength: 21872 LoadingRate: 4629629 ProgramDoneBypass: OFF SPIAddr: 00000000 SecurityBit: ON idcode: 0001081b before program sram: displayReadReg 00002622 Bad Command Memory Erase Reserved9 Non-JTAG configuration is active Done Final Erase SRAM before erase sram: displayReadReg 00004460 Memory Erase Preamble Non-JTAG configuration is active Security Final pollFlag: 40a0 (80) pollFlag: 4080 (0) pollFlag: 4080 (0) pollFlag: 4080 (0) pollFlag: 4080 (0) pollFlag: 4080 (0) pollFlag: 4080 (0) pollFlag: a0 (20) after erase sram: displayReadReg 000000a0 Memory Erase System Edit Mode pollFlag: 20 (0) after erase sram: displayReadReg 00000020 Memory Erase DONE Load SRAM before write sram: displayReadReg 00000200 Reserved9 Load SRAM: [==================================================] 100.00% Done after write sram: displayReadReg 00002622 Bad Command Memory Erase Reserved9 Non-JTAG configuration is active Done Final DONE after program sram: displayReadReg 00002622 Bad Command Memory Erase Reserved9 Non-JTAG configuration is active Done Final
Currently SPI write is only supported for GW5A, not GW5AST (I don't know why but I have strange behaviour). It's weird: I have tried yesterday with tangMega and not seen issue when trying to load SRAM, maybe device is in wrong state... I have to investigate.
I have also to update status display: currently bit/function are displayed according to non GW5A(ST). For this family only GW5A-25 has the correct register decoding.
Currently SPI write is only supported for GW5A, not GW5AST (I don't know why but I have strange behaviour). It's weird: I have tried yesterday with tangMega and not seen issue when trying to load SRAM, maybe device is in wrong state... I have to investigate.
but i can write flash on my mega138pro..
Ok. So I have to recheck everything. SPI flash is seen but not all the time, it fails to write and I'm able to load SRAM. it's more or less totally opposite situation.
Could you try with openFPGALoader --bulk-erase
to see if after your able to load a bitstream (ie device is in wrong state due to an issue when bitstream was written).
when device under wrong state, other write is not work, even with --bulk-erase, need to repower it.
I continue to search the reason to this regression. before this commit there is no issue, after yes. I have some results but it's not really stable and OK/KO depends on bitstream written to the flash...
I have the same problem, when load to sram of 138k, nothing happen
I try, as much as possible, to find why SRAM is not working. But I can't isolate the issue. It's a WIP.
A strange thing I observe: depending of the bitstream written in flash, loading to SRAM works or not. If I have one of the @sipeed bitstream: SRAM fails. With LiteX bitstream: SRAM is working. Maybe something wrong with the security option.
With my last commit I'm able to load a bitstream all the time (with a flash containing a bitstream where security bit is enable or not). Could you confirm/infirm my tests ? Thanks.
c00l!!
now SRAM write ~100% work, thank thee very much!
flash write need twice, 1st time failed(need to wait), then 2rd time work fine
I have observed this issue too. I don't know why but bulk-erase
works all the time.
Maybe the same trick must be applied on Flash side.
for me, it not work. when write sram, it show "Erase SRAM double eraseSRAM", progress to 100% and "DONE", but the board's LEDs light continue in old ways. Both litex and official led.fs .
litex and led.fs uses leds in a similar way. Could you try with litex and ws2812. I use this demo to have real distinct behavior when I have to switch. But If after the load you have something (ie no errors) it's a good news.
- I found I used linux's FT2232 driver, because it can give /dev/ttyUSB device, although it does not realy work on mega138k
- I run Gowin_USB_Cable_Installer.sh and then reboot, /dev/ttyUSB disappear, but Gowin's Programmer works well, both for SRAM and FLASH. In this condition, I use openFPGAloader, sram erase dose not work, and sram programming "DONE" but not work. Another small problem, openFPGAloader default use 6MHz jtag freq, Gowin's doc said it should not more than 2.5MHz, I change it to 2.5MHz but no change.
Hi, after a long period of try it seems I'm able to write the flash: I have added delay after erase SRAM and after sending SPI mode instruction. Could you confirm that? Thanks!