openFPGALoader
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trabucayre
Support for Lattice ECP3?
Lattice ECP5 and MachXO3 works very well with openFPGALoader. How can I help to add support for the Lattice ECP3? I thought it is the "same" as ECP5, but maybe not. At least I can help in testing...
Most of lattice family have more or less same programming sequence. So:
- adding idcode in
part.hpp - comparing for SRAM mode sequence for ECP5 and sequence for ECP3 and simply try to load a bitstream
- same thing with SPI flash access (maybe simply trying since this part is not documented by Lattice).
ECP3 eval boards seems hard to find/expensive :-/
Would be interested to join in ECP3 effort (I'm collegue of michaeltraxler). I have plenty of ECP3 boards to test, and could also send you an old eval board in case you need it. I tried to reverse a bit, and found some structure in ECP3 bit stream files (comparing RBT and BIT), and will try to push Lattice for some information. So: what is missing? Where can I help best? And how?
It is a French board: http://tachyssema.com/old/download.php?view.15 I have recovered it from some "to be thrown away" pile, but it is working and has all three addon modules.
Hi, Yes: if it's possible to have physically access to a ECP3 board I'm interested. I have compared ECP3's bitstream with one for ECP5: some area seems reversed, maybe it's just something required for parsing but not to load/write but without being able to test it's a bit hard to say. Thanks!
Hi, I saw there is an active branch trying to get the ECP3 programming to work. Since I am also interested in this feature I tested the current status of said branch trying to program an LFE3-150EA adding it to part.hpp. The program ran through, but the ECP3 did not respond as if it were programmed. Hence I was wondering if I did something wrong or if there is simply more to do/help to get this feature running :) Many thanks for your efforts!
Hi, Yes I try to implement configuration flow but there is no documentation on how to load bitstream into memory and my only source is svf file. For some reason when I try to use directly the svf file loading fails and loading process using implementation seems to works but the FPGA seems not using new bitstream... So this branch is a WIP and I needs to find what is missing.