place-and-route topic
List
place-and-route repositories
vtr-verilog-to-routing
36
Stars
12
Forks
Watchers
SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research
RISC-V-CPU
107
Stars
22
Forks
Watchers
A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.