max10 topic

Music Light Cube | 音樂全彩光立方（主倉庫）

redchenjs

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

wd5gnr

Intel Quartus Prime Synthesis Engine for Docker

raetro

Simple SoC in VHDL with full toolchain and custom board.

VladisM

Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components

davemuscle