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Published 20 hours ago • verified publisher icon timvideos

Check XADC in Artix-7 based designed

Open mithro opened this issue 8 years ago • 0 comments

When compiling NeTV2 SoC;

WARNING: [Designutils 20-274] XADC DRP clock frequency 6250.0 MHz is outside the valid range of 0.0 to 250.0 MHz for power estimation.

mithro avatar Apr 28 '17 03:04 mithro