ATmegaxxM1-C1
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Pin change interrupt on D10
The datasheet is wrong on page 88, PCICR, Bit PCIE1 states PCINT[14:8], but this should be PCINT[15:8], because D10 (PC7) corresponds to PCINT15 and this pin does generate an interrupt.
I added pin D10 to the header file like this:
#define digitalPinToPCICRbit(p) ( ((p) == 5 || (p) == 6) || \
((p) == 8 || (p) == 9) || \
((p) == 17) || \
((p) >= 21 && (p) <=23) ? 0 : \
( ((p) >= 2 && (p) <= 4) || \
((p) == 12 || (p) ==10) || \
((p) >= 18 && (p) <=20) ? 1 : \
2))
#define digitalPinToPCMSK(p) ( ((p) == 5 || (p) == 6) || \
((p) == 8 || (p) == 9) || \
((p) == 17) || \
((p) >= 21 && (p) <=23) ? (&PCMSK0) : \
( ((p) >= 2 && (p) <= 4) || \
((p) == 12 || (p) ==10) || \
((p) >= 18 && (p) <=20) ? (&PCMSK1) : \
(&PCMSK2)))
and the interrupt works fine. Is this remark:
// Port D10 does not support Soft Serial
only due to the flaw in data sheet? With this patch it could then be removed.
@Papafelice Hello. Just noting your comment. Will you be submitting a Github push with your validated changes?
As to the note: "Port D10 does....", it was so long ago I can not really say. Am guessing this was a note picked up when the origin Soft Serial work, and per your speculation likely from the Datasheet issue you noted. If indeed D10 will work, then agree -- comment should also be removed.
Thank you!