thesofproject
[RFC] Explore the CPU cost benefits of using deinterleaved data along the internal path of the pipeline
Is your feature request related to a problem? Please describe. A lot of components are complex, duplicating logic, do math on de-interleaved data, then have to undo their work
Describe the solution you'd like Evaluate how much this is costing us in CPU time per component that has to de-interleave, consider possibly de-interleaving at host/dai endpoints to reduce the amount of back and forth work.
Describe alternatives you've considered N/A as this is still scoping
Additional context
@cujomalainey good point, I guess the benefit is to de-interleave at host/dai copier only and have SIMD ready data for each processing module in the pipeline. This would also make dealing with odd number of channels more efficient too. @marcinszkudlinski fyi.
