[TEST][Do not review] Test some 16b DMIC topologies
@singalsu you're going to need this linux PR to make your PR work https://github.com/thesofproject/linux/pull/4840
Not following his one either, are we trying to enable 16-bit DMIC for production topologies or just internal tests with development topologies?
Not following his one either, are we trying to enable 16-bit DMIC for production topologies or just internal tests with development topologies?
This is needed for test with a new platform. The reference blobs were for 16 bit and 16 kHz. I think our topologies should allow the build time parameters for the format so our testing tasks could be easier.
Not following his one either, are we trying to enable 16-bit DMIC for production topologies or just internal tests with development topologies?
This is needed for test with a new platform.
A new SOC or a new customer platform? I just don't get why we care about 16 bits these days.
A new SOC or a new customer platform? I just don't get why we care about 16 bits these days.
New SOC still with FPGA, so we have only 19.2 MHz clock to use. We have just passed tests with 16 bit, so I will update this PR with 32 bit formats add so we can test them too. It's a stretch but it does not hurt to shift left activities.