stm32f4discovery_simple clang platform_bat suite does not work

[forGGe]

When falshed to the board, nothing happens. Backtrace:

(gdb) bt
#0  UsageFault_Handler () at /home/executor/projects/thecore/demo-example/core/arch/arm_cm/startup_arm_cm.S:240
#1  <signal handler called>
#2  0x080021a4 in SystemInit () at /home/executor/projects/thecore/demo-example/core/platform/stm32/family/f4xx/system_stm32f4xx.c:487
#3  0x080027a4 in Reset_Handler () at /home/executor/projects/thecore/demo-example/core/arch/arm_cm/startup_arm_cm.S:224
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

[forGGe]

For some reason, binary output from clang shows that memory accesses are reordered:

$ arm-none-eabi-objdump -S stm32f4discovery_simple/platform_bat.clang/build/platform_bat | less

# Search for SystemInit

 <SystemInit>:
  *         SystemFrequency variable.
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
 800217c:       b580            push    {r7, lr}
 800217e:       466f            mov     r7, sp
 8002180:       b084            sub     sp, #16
  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
 8002182:       484a            ldr     r0, [pc, #296]  ; (80022ac <SystemInit+0x130>)
 8002184:       f64e 5c88       movw    ip, #60808      ; 0xed88
 8002188:       f643 0200       movw    r2, #14336      ; 0x3800
 800218c:       f04f 0e00       mov.w   lr, #0

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;

  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;
 8002190:       f64f 73ff       movw    r3, #65535      ; 0xffff
 8002194:       f2ce 0c00       movt    ip, #57344      ; 0xe000
 8002198:       f2c4 0202       movt    r2, #16386      ; 0x4002
 800219c:       f6cf 63f6       movt    r3, #65270      ; 0xfef6
  */
void SystemInit(void)
{
  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
 80021a0:       4478            add     r0, pc
 80021a2:       6800            ldr     r0, [r0, #0]
 80021a4:       6800            ldr     r0, [r0, #0]
 80021a6:       9003            str     r0, [sp, #12]
 80021a8:       f8dc 1000       ldr.w   r1, [ip]
 80021ac:       f441 0170       orr.w   r1, r1, #15728640       ; 0xf00000
 80021b0:       f8cc 1000       str.w   r1, [ip]
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;
 80021b4:       6811            ldr     r1, [r2, #0]
 80021b6:       f041 0101       orr.w   r1, r1, #1
 80021ba:       6011            str     r1, [r2, #0]
 80021bc:       f643 0108       movw    r1, #14344      ; 0x3808
 80021c0:       f2c4 0102       movt    r1, #16386      ; 0x4002

While for GCC everything OK (even on high optimization levels there are no hangs)

$ arm-none-eabi-objdump -S stm32f4discovery_simple/platform_bat.clang/build/platform_bat | less

# Search for SystemInit

080035d8 <SystemInit>:
  *         SystemFrequency variable.
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
 80035d8:       b580            push    {r7, lr}
 80035da:       af00            add     r7, sp, #0
  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
 80035dc:       4a16            ldr     r2, [pc, #88]   ; (8003638 <SystemInit+0x60>)
 80035de:       4b16            ldr     r3, [pc, #88]   ; (8003638 <SystemInit+0x60>)
 80035e0:       f8d3 3088       ldr.w   r3, [r3, #136]  ; 0x88
 80035e4:       f443 0370       orr.w   r3, r3, #15728640       ; 0xf00000
 80035e8:       f8c2 3088       str.w   r3, [r2, #136]  ; 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/
  /* Set HSION bit */
  RCC->CR |= (uint32_t)0x00000001;
 80035ec:       4a13            ldr     r2, [pc, #76]   ; (800363c <SystemInit+0x64>)
 80035ee:       4b13            ldr     r3, [pc, #76]   ; (800363c <SystemInit+0x64>)
 80035f0:       681b            ldr     r3, [r3, #0]
 80035f2:       f043 0301       orr.w   r3, r3, #1
 80035f6:       6013            str     r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 80035f8:       4b10            ldr     r3, [pc, #64]   ; (800363c <SystemInit+0x64>)
 80035fa:       2200            movs    r2, #0
 80035fc:       609a            str     r2, [r3, #8]

  /* Reset HSEON, CSSON and PLLON bits */
  RCC->CR &= (uint32_t)0xFEF6FFFF;
 80035fe:       4a0f            ldr     r2, [pc, #60]   ; (800363c <SystemInit+0x64>)
 8003600:       4b0e            ldr     r3, [pc, #56]   ; (800363c <SystemInit+0x64>)
 8003602:       681b            ldr     r3, [r3, #0]
 8003604:       f023 7384       bic.w   r3, r3, #17301504       ; 0x1080000
 8003608:       f423 3380       bic.w   r3, r3, #65536  ; 0x10000
 800360c:       6013            str     r3, [r2, #0]

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x24003010;
 800360e:       4b0b            ldr     r3, [pc, #44]   ; (800363c <SystemInit+0x64>)
 8003610:       4a0b            ldr     r2, [pc, #44]   ; (8003640 <SystemInit+0x68>)
 8003612:       605a            str     r2, [r3, #4]

  /* Reset HSEBYP bit */