[CD4069/LogicProbe] Another Improvement and some explanations

[steveschnepp]

It's me again, sorry 😉

I did not understand at first why you had to remove the input diode to make it work. That was not satisfactory. Therefore I had to look deeper into the circuit. I discovered quickly that the capacitor is not part of an oscillator, but is part of a high-pass filter. Once that is known, we can simply keep the high-pass filter and only buffer it with 2 NOT gates in input & output.

Note that, as we don't invert the filter anymore, we have to connect the filter resistor to the ground, and fully remove the feedback circuit. Note that here also, the input clamping diodes of the output NOT gate are helping the high-pass filter signal to stabilize. And if you really look into slow oscillation, you can see that the filter is actually a "monostable rising edge detector" 🤣.

The result is a much cleaner version of the circuit, which I think is the minimal one now.

[steveschnepp]

Since I came to the conclusion that it is in fact an "edge detector", I started searching for it, to see if a simpler design exists.

So, totally ironically, I just discovered that it is even an already "well known circuit" : the Leading Edge Detector. 🤦

[tardate]

good stuff @steveschnepp I'll try that...

[tardate]

thanks @steveschnepp I finally got around to updating the project notes!

[steveschnepp]

Great job 👍

Btw, I'm wondering... You mentioned CD4069UBC, which is Unbuffered, but in the picture there is a CD4069BE, which should be Buffered.

So the various information out there is contradictory at best. Some saying exactly that difference and some saying that the CD4069 does not exists in a buffered version.

I'm wondering how to test if it is buffered or not 🤔

[tardate]

good question.

It does seem the 4069 was only ever singly buffered / single-stage design (according the CMOS cookbook).

It does make one wonder what this apparently "TI CD4069BE" chip is I have in my parts box;-) I can't find any reference to a "CD4069BE" from TI or in a bunch of old data books I found on archive.org.

I should put it under test for the variable output impedance one would expect with an unbuffered design.

[steveschnepp]

Indeed. I am wondering about a test that would work to differentiate buffered from unbuffered.

[steveschnepp]

Just asked on EE.SE as I have both references.

[steveschnepp]

And the answer is to simply do a X/Y transfer test. It would be interesting to compare:

• 1 CD4069UBE
• 3 CD4069UBE in series
• 1 CD4001BE with its inputs tied