Use ECAM for reading PCIe config space

[crawfxrd]

Replace x86-specific port IO access with ECAM for reading PCIe config space.

https://github.com/system76/firmware-update/blob/2325f022976ef0a4fd7a340c5bdbf245708d241b/src/app/pci.rs#L109-L115

[crawfxrd]

Since the goal is to work on AArch64, might be better to gate implementation per arch?

• x86_64: Continue using port IO
• aarch64: Parse devicetree to determine address

I've got not clue how that works though.

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We should still do PCIe access using ECAM. But other things like SuperIO and EC would be accessed through devicetree.