sy2002

@MJoergen Great job! I could not resist to quickly trying your latest commit in branch `dev-vga-fractional` on real hardware: As you wrote in your email, the whole thing was a...

@MJoergen I just quickly tried it on hardware: Great job! I love it! ❤️ * To "unbloat" this issue: I moved making a delay function for the Monitor and for...

> Make another demo program, showing how to display a checker board in 3D perspective. Perhaps using interrupts? WOW - that sounds great! Can't wait to see that! :-)

@bernd-ulmann Please decide, if you would like to do this in about the next 5-8 weeks (target: V1.6) or later (target: V1.7). Please use the label feature on the right...

For V1.7: The "simple" version as Michael described in https://github.com/sy2002/QNICE-FPGA/issues/95#issuecomment-683416030

@MJoergen Thank you - this spec sounds very fine! I do not have experience with Ethernet nor with writing an own TCP/IP stack but I guess we can simplify a...

This activity is part of issue #45

Moved from V1.6 to V1.7 because all tests so far indicate that the interrupt system in general and the timer interrupt in particular are both reasonably stable: Everything seems to...

The goal would be to remove again this "jump over the nasty part" section in `test_programs/timer_test.asm`, i.e. remove the `RBRA START, 1`. It works in hardware, but not in the...

@MJoergen Yes, might be. I wrote in my hypotheses section: > Might be as simple as an overflownig UART FIFO because our two ISR take sometimes to long to execute...