QNICE-FPGA
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Get rid of all hardcoded speeds in VHDL
Currently there are a lot of places (e.g. keyboard, UART, debouncers, TIL leds, ...) which rely on some hardcoded 50 MHz clock speed. We need to sift through everything and make generic
SYSTEM_SPEED
statements and have automatically calculated bit widths of all counters depending on the generics (issue #60). Then we need to have one global variable in env1_globals.vhd
where we can conveniently set the speed.
This is a prerequisite for a multitude of things: Coming to a 100 MHz clock speed for the "project retro multimedia machine" in V1.7 and coming to a faster than 100 MHz clock speed in V1.8 or later.
Some original text from the TODO.txt
before it was removed due to opening this issue:
* Get rid of hardcoded clock speed dependencies:
+ Have a global constant that reflects the speed of the board and refactor
all hardcoded frequencies to be dependend formulas from this speed
(e.g. UART, SD card, VGA, debouncer, SD$TIMEOUT_HIGH, etc.)
+ Have a generator that generates the speeds that certain components need
as input, e.g. the SD Card component needs currently hardcoded 25 MHz
+ Keyboard: remove hardcoded 18000 constant
+ Monitor: gets hardcoded 10000 clock cycles => 2.000 "nop" loops