QNICE-FPGA Scope for 1.7

Scope for 1.7

Open sy2002 opened this issue 3 years ago • 2 comments

Gentlemen, we might want to find a videochat (GoToMeeting) time slot in late September or early October to have a rough idea about what will be part of 1.7, since I have the gut feeling that the list tagged "V1.7" might proove to be too large 😄

Aug 20 '20 20:08 sy2002

Here is a list of the open issues currently marked V1.7:

[ ] #7 Optimize ROM/RAM usage
[ ] #10 HW Breakpoints plus debugging support in Monitor
[x] #11 Add qtransfer as standard functionality to the Monitor
[ ] #13 BS/DEL when entering hex digits (and at other reasonable places)
[ ] #14 STDIN switch during input
[ ] #17 Add multicolour support in VGA: Hardware and Emu
[ ] #19 UART inconsistencies
[ ] #20 Make the native assembler independent from an external preprocessor
[ ] #29 Feature Request : Add FIFO to keyboard I/O
[x] #34 Refactor code to remove critical warnings in Vivado
[x] #35 Feature Request: Add interrupt when VGA retraces specific scan line
[ ] #41 Simplify Portability and Maintenance and unify common VHDL code
[ ] #42 Simulation: Timer Interrupt Hardware: Test Daisy Chaining Edge Case
[ ] #45 Timer Interrupt Hardware: Check Edge Cases and Stability
[ ] #55 CPU bus functional test
[ ] #56 Document architectural basics
[ ] #58 Webassembly target of Emulator: Make the timer interrupt work there
[ ] #60 Calculate all the hardcoded bit-widths automatically
[ ] #62 Nasty edge case with timer and memory load via UART
[ ] #63 Making the timer emulation more robust
[ ] #77 VBCC: Test the ISR feature and write a timer interrupt/ISR test for VBCC
[ ] #79 Add Yamaha Sound Chip
[x] #81 CPU speed-up "Fastpath": Direct register to register operation
[x] #86 Making qtransfer should be done automatically
[ ] #87 Maze: Show your gamers some more love :-)
[ ] #88 Assembler parses comments
[ ] #90 MEGA65: HyperRAM: 16-bit write/read not stable
[ ] #91 MEGA65: HyperRAM: Very first control register read needs two reads
[ ] #97 Add support for Ethernet
[ ] #96 Add a stereo SID #96 (and maybe a 6510 co-processor)
[ ] #98 Get rid of all hardcoded speeds in VHDL
[ ] #100 Update to new compiler version, recompile all libraries and test
[ ] #101 Support the concept of SYSINFO
[ ] #102 Q-TRIS 2.0: Classic Mode and Color Mode
[ ] #103 Emulator: Optimize vga_refresh_rendering() for VGA_FONT_DATA and VGA_PALETTE_DATA
[ ] #104 Refactor Daisy-chaining in all devices and provide a proven-to-work implementation for future devices
[x] #105 Palette handling in Monitor
[x] #107 VGA: A reset should reset the VGA to factory defaults
[ ] #110 Write documentation about how to make and publish new OS functions (Monitor functions) in asm, VASM and C
[ ] #112 Use GitHooks to make sure that tools/make-toolchain.sh is executed on each branch switch
[ ] #113 List of qnice-fpga.com website TODOs
[ ] #115 Spinning Globe Demo
[ ] #141 Create PaqNice
[ ] #116 Oldschool demo effects
[ ] #122 Website First WASM Steps Experience: Reformat demos/mandel.asm source code to fit to 80 columns

Aug 27 '20 11:08 MJoergen

Here are issues that have already begun, or perhaps even almost complete:

#17: Already started. Will be part of V1.7
#81: Almost done. Needs documentation. Will be part of V1.7
#34: Is there anything else that needs to be done here?
#41: Not sure what is left to be done here either.

Aug 27 '20 11:08 MJoergen

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Scope for 1.7

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