Victor Suarez Rovere

Does it consider short circuit functionality? Thas isz for example in case of &&, the second should be skipped (i.e. if has side effects such as chamging variables, that should't...

To me, the best solution if && appears in code, is the following: -if second and subsequent operands doesn't have side effects, then it would be equivalent to evaluate both...

Better not to reinvent the wheel https://github.com/MattRighetti/leiserson-retiming/wiki

In regards to integers, all such optimization can be done without issues, in case of floating point operations I suggest to enable all this with a -ffast-math option, that in...

I understand the complexity and thank you take the time to address it. However I doubt it's only useful for graphics projects. I think this would apply to any kind...

Considering that the aim of the tool is "faster development", it seems a bit important

Related paper: https://www.icsi.berkeley.edu/~nweaver/papers/2003-cslow.pdf

To me initially it shouldn't support all kinds of chips, only the ones supported by open source tools (yosys and nextpnr). Having all the data at hand, a better tool...

I find this paper pretty interesting on how to do static timings esimations: "Timing Driven C-Slow Retiming on RTL for MultiCores on FPGAs" by Tobias Strauch @arduissimo http://cloudx.cc/papers/c_slow_retiming_rtl_1807.05446.pdf There are...

Another solution for fast simulation, if the behavior differs a bit from C, is to genrrate C after parsing C. So, in the case of unrolled loops, you can generate...