stm32f0xx-hal
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stm32-rs
A Rust `embedded-hal` implementation for all MCUs in the STM32 F0 family
I'm attempting to use a periodic timer using the HAL Timer driver, on an stm32f031, and have hit a limitation. I can instantiate it and use the driver to setup...
It would be great to be able to store analog pins in the array and process them sequentially. If one needs to have multiple analog pins in the array it's...
I have seen a couple of examples that use the SysTick timer to count the rotations on a rotary encoder, like this example for the [blue pill ](https://github.com/controllerstech/STM32/blob/master/TIMER%20ENCODER%20MODE/main.c). I was...
# Problem: When performing the first write transaction of the i2c scanner example, there is never a NACK, even if no device is attached on the bus. # Hardware required:...
This PR adds DMA interface created using embedded-dma traits, that was copied from the stm32f1xx-hal crate and adapted for the needs of STM32F0 controller line. DMA2 for STM32F091 was not...
This adds an I2C slave implementation for I2C1 that I developed for use in a personal project. This is a very much WIP as no support for I2C2 is available...
This makes the peripheral files really peripheral specific and moves the glue into a separate file. I'd like to compare it to all the datasheets to make sure there is...
Before this change, the following user code would compile and run without warnings, and would return an uninitialized `[u8; 16]`, which would be UB: ```rust struct UB; use crate::stm32::DAC; impl...
Timer in [stm32f4xx-hal](https://github.com/stm32-rs/stm32f4xx-hal/blob/master/src/timer.rs) crate implements the [Cancel](https://docs.rs/crate/embedded-hal/0.2.3/source/src/timer.rs) trait. You may be interested in doing the same for this crate. Examples: - https://github.com/stm32-rs/stm32f4xx-hal/blob/master/examples/timer-periph.rs - https://github.com/stm32-rs/stm32f4xx-hal/blob/master/examples/timer-syst.rs
I am currently working on a design involving an STM32F042 microcontroller that involves the use of both SPI controllers, one operating as a master and one operating as a slave....
