Pipeline depth expected?

[shadjis]

problem_app2.txt

Maybe not an issue but attached simple example app has 2 parallel pipelines with 56 iterations each, one takes 68 cycles the other 69 cycles. I am wondering if this expected: it seems right if the pipeline latency was around 13 cycles. Is that correct for SRAM read, add or mul, and SRAM write? Or is there unnecessary overhead?

[shadjis]

this app now also crashes with same error as #75 java.lang.IndexOutOfBoundsException: 7

[mattfel1]

error should be gone in 307fa5bdca722d44c89c321f8d2667a50d1c9775. Running all tests now to see if anything broke in the process