sprintersb

apparently avr-gcc doesn't do this optimization Link with `-mrelax`, which performs other optimizations, too. Notice there are cases / sections that must not be optimized like `.vectors` or `.jumptables`. Also...

As a work-around for affected versions, -fwrapv seems to work. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90886#c11

What's the problem? All that has to be done is to pass `-mrelax` to `ld`.

> Maybe we need to introduce 32-bit register classes. Would be great if this would also work for **64-bit types** and aggregates like with avr-gcc. Here is a sample code...

> fixed by https://reviews.llvm.org/D141752 Not completely, take for example ```c++ volatile int* stv (int volatile *p, int volatile *q) { *q = 0; *p++ = 0; return p; } ```...

Fixed by 5021ae0eb77626a4969c253c10f53da52e522177.

Done.

There's at least one problem though. AVR-LibC's printf-like functions recognize `%S` as an ordinary string located in flash, as opposed to the standard that uses `%S` to specify wide strings.

Seems some of the issues are alredy fixed: * Unset `x` flag on headers: 3edfb571b3f2961fe0d8e53734e166469f739ee9. * Update headers to recent versions (only for devices that weren't supported in v2.1): 7b0e173675ad601fd4f66e0dc3a54fe64997ee21,...

I don't actually see the purpose of this patch, as AVR-LibC's print functions don't support 64-bit values.