shift operations have swapped rs and rt compared to other r-type operations

[schferbe]

When assembling:

add r1, r2, r3
sub r1, r2, r3
sll r1, r2, r3
srl r1, r2, r3
sra r1, r2, r3

the bytecode shows that rs and rt for shift operations are swapped. For r-type instructions being | opcode | rs | rt | rd | shammt | fcode | For add and sub the mapping is as follows: rs = r2 rt = r3 rd = r1 For mentioned shift operations it is: rs = r3 rt = r2 rd = r1

Is there a reason why it is assembled like that?

Also sll has no effect. (srl and sra not tested)