MIPS-Simulator

A functional MIPS CPU simulator implemented in Haskell.

A year ago, I implemented a RISC-V simulator in C++. I had long dreamed of using a functional programming language to express the circuit of a CPU. But at that time, implementing lazy-evalution in C++ is slow and painful. So the semester in Computer Architecture course, I made this MIPS simulator.

As functional programming language works well in expressing this hardware circuit logic, I'm implementing A MIPS CPU, just by directly translating Haskell into Verilog.

All CPU and CPU simulators I've made are listed below.

Usage

Currently I haven't implemented a command-line interface for interacting with this simulator. You can only run tests or hack it yourself for now.

Install Stack and simply run:

stack test

Roadmap

• Single-Cycle Processor
  • [x] R type
  • [x] I type
  • [x] ALU test
  • [x] Compare and shift
  • [ ] Support HI and LO, multiply and division
  • [x] Branch instruction
  • [x] jump and link
  • [x] J type
  • [x] Memory operations
  • [ ] unsigned / high addr memory operations
• Multi-Cycle Processor
  • [x] Data path
  • [x] Stalling
  • [x] Forwarding
  • [x] Branch Prediction
  • [ ] Advanced Branch Predictor
  • [x] Hazard Tests

Reference

• https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdf (some opcode is wrong in this pdf)
• http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html