The Dynareckoning

[Ravenslofty]

The recompiler should be modified/rewritten to use a single framework for all chips. This means more efficient use of maintenance time, because a backend for the framework ports all of the chips, rather than just one. This is probably going to take a long time.

At the moment, there is the SuperH recompiler used for the main chip, and the ARM recompiler for the AICA. The SuperH recompiler uses SHIL as its optimisation layer, while the ARM recompiler converts ARM instructions straight to assembly.

The aim is to use SHIL as the foundation for the compiler framework, with modifications, such as using SSA form, for optimisations, which is then either turned into assembly or interpreted. This framework could then be ported to whatever guest ISA, as long as it emits SHIL.

Off the top of my head, here's a rough to-do list.

• [ ] SSA-ify SHIL
• [ ] Tests about semantics for backends
• [ ] Tests for equivalence before and after optimiser
• [ ] Consider if SH condition bits should be virtual registers of their own.
• [ ] Migrate ARM decoder to SHIL
• [ ] Tests for equivalence between old and new compiler
• [ ] Consider if ARM condition codes should be virtual registers of their own.
• [ ] Remove old ARM compiler
• [ ] Migrate DSP to SHIL?
• [ ] SSA optimisations to replace existing opts?
• [ ] SSA-based register allocation?

@skmp bullied me into making this issue ;~;

[davidgfnet]

Yay! Yeah we need some quite high abstraction intermediate code, that is able to express complicated stuff with a lot of detail. I'm sure some of the instruction sequences in SH4 can be nowadays replaced with better instructions in some architectures.

[Ravenslofty]

I think the current code tries to recognise division operations by pattern matching, so that's something we could/should work on.

[Ravenslofty]

Something @skmp mentioned is letting the frontends have higher-level concepts like function entries and exits, and then put them to a lowering pass to SHIL. This would look something like this:

[skmp]

You want a "highering" pass first, to embed high levle information.

Eg, sh4 -> shil + metadata -> highering pass -> high level shil -> optimizations -> several lowering passes to mid IR -> reg alloc -> lowering to backend specific IR -> codegen

if you want the whole shebang and all