X86-64 AES-ni support

[mjmacleod]

It would be nice if simde implemented support for AES, especially AES round as this particular part of AES is also used in a lot of hash algorithms etc.

Many x86 based CPUs support this via AES-ni; and a lot of armv8 cores implement it via 'crypto extensions'. For arm cpus that don't have neon its possible to make use of other neon intrinsics.

I've submitted a PR to sse2neon that implements _mm_aesenc_si128 which is the most important instruction - it might be nice to have this as a starting point https://github.com/DLTcollab/sse2neon/pull/6

• [x] _mm_aesenc_si128
• [x] _mm_aesdec_si128
• [x] _mm_aesdeclast_si128
• [x] _mm_aesenclast_si128
• [x] _mm_aesimc_si128
• [ ] _mm_aeskeygenassist_si128

Reference: https://software.intel.com/sites/landingpage/IntrinsicsGuide/#othertechs=AES

[nemequ]

Thanks for the notification. I'm definitely interested in this, just not sure when I'll get around to it. Patches welcome, of course ☺

[lidh15]

are we going to work on this after 4 years?

[mr-c]

Hello @lidh15 . As this is an open source community project, anyone is welcome to work on this feature. If you want to participate, I would be happy to assist you or anyone.

[lidh15]

Hello @lidh15 . As this is an open source community project, anyone is welcome to work on this feature. If you want to participate, I would be happy to assist you or anyone.

I'm not an expert on this but what I found was that we could simply pick those APIs @mjmacleod contributed to sse2neon out and include them, they worked errorless with simde during compilation. But the program reported segfault in runtime, so I think this solution is not a best practice.

[Vineg]

May be useful: there is aesenc implementation that looks simple https://github.com/veorq/aesenc-noNI And I've adapted code from https://github.com/dhuertas/AES to implement _mm_aesenc_si128 and _mm_aesdec_si128 methods here https://github.com/Vineg/software-aes-instructions

[mr-c]

@Vineg can you send a PR?